The potential for chiplet technology to be a transformational paradigm is now widely recognized. The cost, time-to-market, and power consumption benefits of chiplet-based solutions are compelling the industry toward integrating multiple dies in a single package.
AI has emerged as a primary catalyst for this trend. Custom silicon designed for AI benefits significantly from the chiplet approach, which combines dense logic and memory with the need for high-speed connectivity. The push for custom AI hardware is rapidly evolving, with a focus on energy-efficient designs. Chiplets offer the flexibility to create systems-in-package that balance cost, power, and performance for specific workloads without starting from scratch. AI's unique needs for inter-die communication make reducing latency crucial, and the rollout of larger clusters emphasizes the role of high-speed, optical interconnects.
The application of chiplets extends beyond AI, with growing use in high-performance computing (HPC), next-generation 6G communication, and data center networking. Finding connectivity solutions that satisfy the requirements of these varied applications is essential to fulfilling the potential of chiplets and opening new avenues for innovation across the industry.
Tony Chan Carusone was appointed Chief Technology Officer in January 2022. Tony has been a professor of Electrical and Computer Engineering at the University of Toronto since 2001. He has well over 100 publications, including 8 award-winning best papers, focused on integrated circuits for digital communication. Tony has served as a Distinguished Lecturer for the IEEE Solid-State Circuits Society and on the Technical Program Committees of world’s leading circuits conferences. He co-authored the classic textbooks “Analog Integrated Circuit Design” and “Microelectronic Circuits” and he is a Fellow of the IEEE. Tony has also been a consultant to the semiconductor industry for over 20 years, working with both startups and some of the largest technology companies in the world.
Tony holds a B.A.Sc. in Engineering Science and a Ph.D. in Electrical Engineering from the University of Toronto.
There has been tremendous demand to deploy AI models across new and diverse hardware architectures. Many of these architectures include a variety of processing nodes and specialized hardware accelerators. The challenge is to take trained AI models developed in various open-source software frameworks and execute them efficiently on these architecures. Software tools must evolve to provide features such as AI model import, graph analysis, quantization, optimization, and code generation. Creating AI-centric software development tools is a complex undertaking that requires expertise in AI network theory and construction, high-performance computing, compilers, and embedded systems. This talk will share some of our experiences developing Cadence’s NeuroWeave Software Development Kit (SDK). NeuroWeave is a collection of tools and software libraries for optimizing and compiling AI models in order to execute them efficiently on Tensilica DSPs and Neo accelerators.
Eric Stotzer is a Software Engineering Group Director at Cadence Design Systems, where he is responsible for the Neuroweave SDK and Xtensa Neural Network Compiler (XNNC). Eric worked for 30 years at Texas Instruments developing system software tools for DSPs and MCUs. Before coming to Cadence, he was at Mythic working on a neural network compiler for mixed-signal AI accelerators. He is a coauthor of the book Using OpenMP - The Next Step: Affinity, Accelerators, Tasking, and SIMD, (MIT Press 2017). Eric holds a PhD in Computer Science from the University of Houston.
Cadence’s goal is to empower engineers at semiconductor and systems companies to create innovative, intelligent, and highly differentiated electronic products that transform the way people live, work, and play. The company’s Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to systems—in AI, IoT, mobile, 5G, consumer, cloud, data center, automotive, aerospace, and other market segments. Cadence offers specialized IP with industry-leading performance, power efficiency, and interconnects, as well as AI-specific verification and implementation solutions. The company also employs machine learning within its tools and solutions to enable the best power, performance, and area (PPA), quality of results (QoR), and time-to-market (TTM) benefits.
